In the conventional technology, there are normally multiple data lines and multiple gate lines (or referred to as scanning lines) cross with the date lines in a display region of a touch display panel. Furthermore, touch electrodes of the touch display panel in the display region have different shapes according to different touch-control types. For example, referring to FIG. 1, in a display region (not shown in FIG. 1) of a touch display panel, there are multiple data lines d1 to d8 and multiple scanning lines s1 to s6, together with multiple touch electrodes pad1 to pad4. Normally, the touch electrodes pad1 to pad4 cover the multiple scanning lines and data lines in the whole display region of the touch display panel. It should be noted that FIG. 1 only schematically shows a simple structure of the touch display panel without limiting the quantities of the scanning lines, data lines and touch electrodes.
In the conventional technology, parasitic capacitors exist between the touch electrode and the scanning line, between the touch electrode and the data line, and between adjacent touch electrodes. For example, in a design shown in FIG. 1, a parasitic capacitor C1 exists in a position where the touch electrode pad1 overlaps with the scanning line s1 in vertical direction, and parasitic capacitor C2 exists in a position where the touch electrode pad3 overlaps with the data line d1 in vertical direction. The presence of the parasitic capacitors C1 and C2 is equivalent to extra load capacitors exerted on the touch electrodes, thereby increasing the overall load of the touch display panel. Parasitic capacitor C3 exists between adjacent touch electrodes pad1 and pad2. Due to the parasitic capacitor C3, touch detection on one touch electrode will be interfered by an adjacent touch electrode and the touch-control accuracy will be reduced.